Next up in qrouter development: Parsing the “VIARULE” statements from the technology LEF file. That lets qrouter generate vias at all orientations (rotations), rather than depending on specific via geometries defined in the technology LEF. This will greatly cut down on the annoying DRC errors that qrouter generates in layouts.
After that, I’ll be working on getting qrouter to do chip top-level routing so I don’t have to tell everybody that they have to do it by hand. Working toward the goal of one-button-push chip assembly!
If you have any ideas or needs for qrouter, we can discuss them here. My longer-term to-do list is quite long. . .